This invention relates generally to the Instruction Set Architectures (ISA) of microprocessors. More particularly, the invention discloses methods and means for reducing the amount of memory required to store executable codes while maintaining compatibility with uncompressed legacy assembly code.
As the size of a RISC microprocessor and the memory required to store executable code increases so too does the manufacturing cost. There is a need, especially for embedded applications, to lower the silicon area of devices. One way to lower the area is to reduce the memory required to store the microprocessor instructions that comprise a typical application code.
There is a need for reducing instruction code size without sacrificing functionality or impacting performance or design complexity.